Direct current electroluminescent panel using amorphous semiconductors for digitally addressing alpha-numeric displays

ABSTRACT

An alpha-numeric display panel with a matrix of amorphous semiconducters mounted on a substrate. Each of the semiconductors comprises a vitreous material layer contiguous with an electroluminescent material layer. Metal electrodes with small metal islands positioned in the center of the electrodes and isolated therefrom are vapor deposited through a photoetched mask on each side of the vitreous material, or vitreous switching layer. The electrodes and islands are in exact registration on opposite sides of the vitreous switching layer. An electrically conductive layer is vapor deposited on one side of a glass substrate. The electroluminescent layer is contiguous with one side of the vitreous switching layer on one side and is contigous with the electrically conductive layer on the opposite side. The matrix of amorphous semiconductors are connected to a voltage source, ground, and to bucket brigade shift registers, such that a display is generated according to video information transmitted to the read-out and matrix. The electrodes on the rear of the vitreous switching layer are connected to a positive direct current voltage source. The electrically conductive layer is connected to ground. The rear metal islands are connected to row shift registers, and the front metal islands are connected to the column shift registers. The column shift register has an overriding video signal thereon. The vitreous layer is biased close to, but less than, the amount required for conduction such that an increased voltage potential across the vitreous layer provided by the combination of the shift register and video signals causes the amorphous semiconductor to conduct and, therefore, the electroluminescent layer to luminesce providing a display at that element. Horizontal and vertical clock pulses, from the column and row shift registers, synchronously switch voltages to the rear and front metal islands until the entire panel has been scanned. The electroluminescent layers remain &#39;&#39;&#39;&#39;on&#39;&#39;&#39;&#39;, thus displaying an alpha-numeric read-out, until the direct current voltage source is removed from the rear electrode. This is a divisional of prior application Ser. No. 310,736, filed 30 Nov. 1972, now U.S. Pat. No. 3,807,036.

United States Patent Fischer [75] Inventor: Albert G. Fischer,Pittsburgh, Pa.

[73] Assignee: The United States of America as represented by theSecretary of the Army, Washington, DC.

[22] Filed: Nov. 28, 1973 [21] Appl. No.: 419,827

Related US. Application Data [62] Division of Ser. No. 310,736, Nov. 30,I972, Pat. No.

[52] U.S. Cl. 340/324 M; 340/166 EL [51] Int. Cl. G06F 3/14 [58] Fieldof Search... 340/324 A,'324 AD, 166 EL, 340/168 SR; 357/2, 24

[56] References Cited UNITED STATES PATENTS 2,877,371 3/l959 Orthuber eta1. 357/2 3,715,607 2/1973 Fleming 357/2 3,789,240 l/l974 Weimer 357/243,792,465 2/1974 Collins et al. 340/324 R Primary ExaminerMarshall M.Curtis Attorney, Agent, or FirmMax L. Harwell; Nathan Edelberg; RobertP. Gibson 7 1 ABSTRACT An alpha-numeric display panel with a matrix ofamorphous semiconducters mounted on a substrate. Each of thesemiconductors comprises a vitreous material layer contiguous with anelectroluminescent material layer. Metal electrodes with small metalislands Oct. 14, 1975 positioned in the center of the electrodes andisolated therefrom are vapor deposited through a photoetched mask oneach side of the vitreous material, or vitreous switching layer. Theelectrodes and islands are in exact registration on opposite sides ofthe vitreous switching layer. An electrically conductive layer is vapordeposited on one side of a glass substrate. The electroluminescent layeris contiguous with one side of the vitreous switching layer on one sideand is contigous with the electrically conductive layer on the oppositeside. The matrix of amorphous semiconductors are connected to a voltagesource, ground, and to bucket brigade shift registers, such that adisplay is generated according to video information transmitted to theread-outand matrix.

The electrodes on the rear of the vitreous switching layer are connectedto a positive direct current voltage source. The electrically conductivelayer is connected to ground. The rear metal islands are connected torow shift registers, and the front metal islands are connected to thecolumn shift registers. The column shift register has an overridingvideo signal thereon. The vitreous layer is biased close to, but lessthan, the amount required for conduction such that an increased voltagepotential across the vitreous layer provided by the combination of theshift register and video signals causes the amorphous semiconductor toconduct and, therefore, the electroluminescent layer to luminesceproviding a display at that element. Horizontal and vertical clockpulses, from the column and row shift registers, synchronously switchvoltages to the rear and front metal islands until the entire panel hasbeen scanned. The electroluminescent layers remain on, thus displayingan alpha-numeric read-out, until the direct current voltage source isremoved from the rear electrode.

7 Claims, 3 Drawing Figures HORIZONTAL 4 CLOCK A HORIZONTAL iioz.

{E026 VERTICAL 22 CLOCK Patent Oct. 14, 1975 DIRECT CURRENTELECTROLUMINESCENT PANEL USING AMORPHOUS SEMICONDUCTORS FOR DIGITALLYADDRESSING ALPI-IA-NUMERIC DISPLAYS This is a divisional of priorapplication Ser. No. 310,736, filed 30 Nov. 1972, now U.S. Pat. No.3,807,036.

BACKGROUND AND SUMMARY OF THE INVENTION This invention is in the fieldof large flat panel electroluminescent diode read-out displays usingamorphous semiconductors with vitreous material for switching videosignals across electroluminescent elements.

Previously, the development of display panels was directed toward gasdischarge elements, solid breakdown voltage devices, etc. which weretriggered by alternating current (a.c.) voltage. More recently, displaypanels using miniaturized electroluminescent elements for transmittal oflight are used wherein the elements are turned on" by a d.c. voltage.

The present invention comprises a predictable and efficient breakdownamorphous semiconductor having a-vitreous switching layer that switcheson" by coincident voltages at the rear and front metal islands on eachside thereof. These coincident voltages are produced as horizontal andvertical clock pulses at the output of shift registers. A positive d.c.voltage source is applied to the rear electrode on the vitreousswitching layer and sets up an electric field in the vitreous andelectroluminescent layers between the positively charged rear electrodeand a grounded electrically conductive layer, which is contiguous withthe electroluminescent layer and the glass substrate. When output clockpulses from both shift registers are coincident at their respectiveislands in any one element, the vitreous switching layer will break downin the area between the metal islands and start conducting currenttherethrough if a video signal is also present. The electric fieldprovided by the d.c. voltage source applied to the rear electrodes willsustain conduction in the vitreous and electroluminescent layers, thusholding the electroluminescent layer in a luminescent condition evenafter the video signal is removed, and can only be stopped by removal ofthe d.c. voltage source. For the panel to accept a subsequent display,the d.c. voltage source is simply switched off for removal of thealpha-numeric display and switched back on again to establish theelectric field for the subsequent display.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic circuit showingbucket-brigade type scanners, feeding rows and columns of the amorphoussemiconductor electroluminescent elements;

FIG. 2 is a diagrammatic illustration of a single element amorphoussemiconductor electroluminescent element; and

FIG. 3 is a V-1 curve of the electrical characteristics of the vitreousswitching element within the amorphous semiconductor.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. 1 illustrates apartial schematic of a multielementelectroluminescent display panel. Atypical element 10 (shown in the upper right) is biased by d.c. voltagesource 12 when switch SW1 is closed, thus placing an electric fieldacross element 10. Element 10 is addressed by clock pulses from columnand row bucket brigade shift registers, respectively, arriving on columnY and row X. The column bucket brigade shift register is comprised ofhorizontal clocks A and B, represented by numerals 6 and 8, andhorizontal synchronizing pulse generating circuit 20. The row bucketbrigade shift register is comprised of vertical clock 22 and verticalsynchronizing pulse generating circuit 21. Horizontal clocks 6 and 8produce square waves 6a and 8a that are out of phase with each other.Square waves 6a and 8a are applied to alternate gates of column shiftregister MOSs to hand off, in a bucket brigade manner, the horizontalsynchronizing pulses from circuit 20 along the column shift registerMOSs O10, O12, O14, O16, Q18, and others (not shown). The outputs fromthe column shift register MOSs are applied to the gates of video MOSsQ20, O22, O24, Q26, and others (not shown) totalling the number ofcolumns in the matrix. Video signals are applied to terminal 28.Terminal 28 is connected to all of the source terminals of the videogate MOSs O20, O22, O24, O26, etc. When a video signal is present atterminal 28 and the video MOSs are gated on by display information fromhorizontal clocks 6 and 8, the video signal willbe transmitted toislands 24a of elements 10. This display information present at clocks 6and 8 may be transmitted on a high frequency carrier wave, such as alaser beam or a VHF channel, into the horizontal clocks of the columnbucket brigade shift register. Similarly, display information present atvertical clock 22 hands off the vertical signal pulses from circuit 21along row shift register MOSs Q40, Q28, and others (not shown) totallingthe number of rows in the matrix. This display information is firstreceived, amplified, and decoded using circuitry similar to a televisionreceiver (with such circuitry not being a part of this invention) and isproduced as digitalized information at the output of the column and rowshift registers. The shift registers operate similar to deflected coilsof a television, while the video gate MOSs operate as modulationdevices. When there is coincidence of the digitalized information, thevideo signal addresses an electroluminescent element 18. The horizontalshift register operator typically at 5 kilocycles for an element 18addressing time of 200 microseconds.

Referring to FIG. 2, a typical display element 10 of this invention isshown. Element 10 is an amorphous semiconductor that comprises avitreous switching element layer 26, an electroluminescent element 18made of layered p-n material, an electrically conductive layer 16, and aglass substrate 32. Rear electrode 14 and rear metal islands 14a arevapor deposited on the rear side of layer 26. Front electrode 24 andfront metal island 24a are vapor deposited on the front side of layer26. An external d.c. voltage source 12 is connected to rear electrode 14when switch SW1 is closed. Layer 16 is connected to ground terminal 30.Electrical leads from a column and a row, represented as column Y androw X, are shown connected to front metal island 24a and rear metalisland 14a, respectively. Islands14a and 24a are positioned directlyopposite each other on layer 26. Also, rear electrode 14 and frontelectrode 24 are positioned directly opposite each other on layer 26.Operation of the amorphous semiconductor will be explained in moredetail later with reference to FIG. 2.

The display panel is prepared by the process as explained hereinbelow.Starting with glass substrate 32, an electrically conductive layer 16 oftransparent material, such as tin oxide, is evaporated on one sidethereof. A direct current electroluminescent layer 18 is then vapordeposited on conductive layer 16. Layer, 18 may be a polycrystallineheterjunction sandwich structure made of group II-VI materials, oralternately a layer composed of many single crystalline light emittingdiodes. In either case, layer 18 will become operative at a few voltsand milliamperes of dc power, e.g., 8 volts at] milliamperes. Typically,an embodiment of a panel made in this manner has 250,000 elements in apanel having 500 rows and 500 columns If layer 18 is polycrystallineheterjunction sandwich structure, metallized square electrodes 24 andsmall metal islands 24a enclosed by and insulated from electrodes 24 arevapor deposited through a photoetched mask onto the back side ofelectroluminescent layer 18. In further developing element 10 for use asa display element, electrodes 24 and islands 24a are separated by aninsulator mate rial, which is deposited by photoresist techniques, suchthat electrodes 24, but not front islands 24a, are insulated from columnleads. The insulator material may be aluminum oxide. These column leadsare deposited over the insulator material and are connected toeach ofthe front islands such that the column leads are insulated from frontelectrode 24. However, the remainder of front electrode 24 not insulatedfrom the column lead is in intimate contact with layer 18. The column,leads are connected at their opposite end to the drain terminal of thevarious video MOSs O20, O22, O24, Q26, etc. Vitreous switching layer 26is deposited over the electroluminescent layer 18, the insulatormaterial layer, and the column leads deposited thereon. Layer 26 is from1 to 10 microns in thickness. Layer 26 may be vacuum deposited, rfsputtered, etc. A greatvariety of materials are known to exhibit theswitching effect needed for layer 26. Some of these materials aregermanium, sulfur, selenium silicon oxide, aluminum oxide, etc. On topof this vitreous material layer 26 are deposited the rear electrodes andrear islands in the same manner that the front electrodes and frontmeta] islands were deposited on layer 18, i.e., by vapor depositingthrough a photoetched mask. The electrodes and islands deposited on eachside of layer 26 are in exact registration. A layer of insulatormaterial is deposited by photoresist techniques such that the rearelectrodes 14, but not the rear metal islands 14a, are insulated fromrow leads. The row leads are connected to the rear metal islands. Rearelectrode 14 is in intimate contact with layer 26. Lead wires from allof the rear electrodes 24 are connected to power supply 12. The rowleads are connected to the rear metal islands at one end and to thebucket brigade vertical shift register MOSs O28, O30, O32, O34, Q36,Q38, Q40, etc., at the other end. With pulses on row leads from thebucket brigade vertical shift register MOSs and pulses on the bucketbrigade horizontal shift register MOSs connected, respectively, to rearmetal islands and front metal islands, the vitreous switching layer 26,which these islands are connected across, conducts through the areabetween the particular metal islands 14a and 24a being pulsed. Theconducting area between islands 14a and 24a forms a generallycylindrical aisle through layer 26. The cylindrical aisles extendingthrough the electroluminescent layer may simply be theelectroluminescent layer 18 left uncovered, or grooves etched all thewaythrough to conductive layer 16. These grooves are needed for opticalseparation suchthat light from one element cannot be scattered into thenext element. The grooves may also be filled with black resin by simplyrubbing the resin therein. A typical IV characteristic curve for thevitreous material of layer 26 is shown in FIG. 3. These characteristicsare discussed below with reference to the voltages existing betweenelectrodes 14 and 24.

FIG. 1 illustrates a partial schematic of the overall scanning systemwith the matrix of amorphous semiconductor attached to voltage source 12and to the var,-

ious column and row leads. When switch SW1 is. closed, the positiveterminal of voltage source 12 :is connected to rear electrodes 14 on allthe. semiconduc-. tors, establishing a potential gradient through all ofthe elements between rear electrode 14 and layer 16 that is connected toground 30. Front electrode 24 is, therefore, at some floating potentialbetween the positive voltage from voltage source 12 and the groundpotential on layer 16. The voltage differential between electrodes 14and 24 is close to, but under, the amount needed to initiate conductionthrough the area of the vitreous switching layer 26 thatis between rearelectrode 14 and front electrode 24. When layer 26 com ducts there isalso conduction through layer 18 between front electrode 24 and layer16,thus causing electroluminescent layer 18 to luminesce. Scanner,

' ister MOSs in bucket brigade hand off fashion. These.

hand off horizontal synch pulses are applied to the gates of video MOSsQ26, Q24, Q22, Q20, and others (not shown). When pulse 6a from clock 6is positive,

pulse 8a from clock 8 is negative, and vice versa. Video information,applied at terminal 28 is connected to the source terminals of the videoMOSs. Electrical leads from the drain terminals of the video MOSsareconnected to column leads which are, inturn, connected to metalislands 24a of the semiconductors. In operation, a horizontalsynchronizingpulse circuit, represented by block 20, producessynchronous pulses that are moved along the bucket brigade horizontalshift register MOSs Q10, Q12, Q14, Q16, and Q18 by alternate pulses 6aand 8a. Vertical clock 22 applies positive voltage pulses to alternategates of the bucket brigade vertical shift register MOSs Q28, Q30, Q32,O34, O36, Q38, and Q40. A vertical synchronizing pulse produced, throughresistor R5, at the output of vertical synchronizing pulse circuit 21 isalso moved along the bucket brigade vertical shift register MOSs. Morespecifically, video information .is stored in one of, the two storageregisters, or horizontal clocks A and B, rep resented by blocks 6 and 8,while the vertical shift register 22 discharges its previously storedinformation into all elements of one column simultaneously. Storage anddischarge of the registers are out of phase with each other as shown bythe output waves 6a and 8a therefrom in FIG. 1. The video input signalsto the matrix at terminal 28 is the actual source of information that isdisplayed on the various electroluminescent elements of the matrix. Thebucket brigade verticalshift register MOSs gate the various video MOSson such that when the video information is present at the sourceterminal of the video MOSs the information is passed to the drainterminal and on to the islands 24a of the elements.

In the shift register addressing method, the column scanner is a slowshift register that scans, say for exam ple, the right column. Duringthe time that the slow register scans this one column, the fast registerscans all of the rows in a sequential manner. Therefore, while theextreme right column has a voltage applied to the middle metal islands24a, all of the vertical synchronizing pulses from 21 are applied to therear metal islands 14a. Only at the addressing coincidence of the columnY and row X elements along this extreme right column will the videosignal, present at terminal 28 and at the source terminal of the videoMOSs, switch the vitreous layer 26 on, causing luminescence of thatelement. lnstantaneously, only the element 10 in the extreme upper righthas the full voltage applied across the rear metallic island 14a and themiddle metallic island 24a. If the video signal is present at the videoinput terminal 28, this signal switches the element which has thevoltages coincidence thereacross and the element in this case element 10will luminesce. The slow column scanner will then switch to the nextcolumn and the fast scanner will switch on all the rows sequentiallybefore the slow column scanner switches again. The video signal has alarger voltage peak than the column and row scanner voltages, andconsequentially switches the coincidence address elements on. After theentire panel has been scanned, the scanners may be switched off and theimage retained. The image may be erased by opening switch SW1 to theexternal d.c. voltage source 12. The panel may then be readdressed. Animportant alternative to erasing the image over the entire panel is thatof erasing one line at a time by inserting a switch in each line (rowand column) and selectively opening these switches after the entirepanel has been scanned. Also, selective erasure of single lines of thealpha-numeric read out on the panel may be controlled from thebroadcasting station by coded signals to which the receiver issensitive.

In operation, assume that the extreme right column is pulsed, thestrongly positive pulse video signal, at the source terminal of videoMOS Q26, is passed through MOS Q26 to front metal island 24a of element10. The video signal sets up a high electric field in the small areabetween the rear metal island 14a and front metal island 24a. The videosignal voltage is greater than the threshold voltage that has beenestablished acrosslayer 26 by applying dc. voltage source 12 to rearelectrode 14. Therefore, when the video signal is applied the small areaof layer 26 that is between islands 14a and 240 will break-down andbegin conducting. The differential voltage between the positive dcvoltage applied to electrode 14 and the floating voltage on electrode 24is sufficient to break-down the entire area of layer 26 when the areabetween islands 14a and 24a has brokedown. Conduction is sustainedthrough layer 26 by dc. voltage source 12 even after the video signalhas been removed. That is, the unswitched vitreous material of layer 26has high impedance until the video signal is applied and the lowimpedance after the video signal is applied. After the column and rowshift registers have scanned the entire panel, the alpha-numericread-out will remain on the display panel until the panel isreaddressed. When conduction begins through layer 26 this conductionextends through layer 18 and into layer 16. The electroluminescentmaterial in layer 18 will luminesce when conduction is taking placetherein.

I claim:

1. An electroluminescent display panel comprising:

a light translucent substrate;

a transparent electrically conductive layer contiguous with one side ofsaid substrate; layer of electroluminescent material contiguous withsaid transparent electrically conductive layer; a plurality ofmetallized front electrodes and front islands with said front electrodescontiguous with said layer of electroluminescent material, said frontelectrodes and said front islands insulated from each other; pluralityof column leads connected to said plurality of front islands; a layer ofvitreous material contiguous with said plurality of metallized frontelectrodes and front islands and said layer of electroluminescentmaterial; plurality of metallized rear electrodes and rear islandscontiguous with said layer of vitreous material; a plurality of rowleads connected to said plurality of rear islands; positive directcurrent power supply, said power supply connected to said plurality ofmetallized rear electrodes for establishing a voltage differentialacross said layers of vitreous material and electroluminescent materialsuch that the voltages differential between said rear and frontmetallized electrodes is close to the breakdown voltage of said layer ofvitreous material; bucket brigade column shift register having twohorizontal clock pulse circuits and horizontal synchronizing circuit asinputs and a plurality of column shift register metallic oxidesemiconductors as outputs; bucket brigade row shift register having avertical clock pulse circuit and vertical synchronizing circuit asinputs and a plurality of row shift register metallic oxidesemiconductors as outputs wherein said two horizontal clock pulsecircuits and said vertical clock pulse circuit are adapted for receivingdisplay information; video terminal; plurality of video metallic oxidesemiconductors having a gate electrode, a drain electrode, and a sourceelectrode wherein said video terminal is connected to said sourceterminal of the plurality of video metallic oxide semiconductors andwherein the outputs of said plurality of column shift register metallicoxide semiconductors is connected to said gate terminal of the videometallic oxide semiconductors for switching video invormation throughthe video metallic oxide semiconductors to the rear metal islands forbreaking down said layers of vitreous material and electroluminescentmaterial to provide a display on said electroluminescent materialaccording to the input display information to said column and row shiftregisters. 2. An electroluminescent display panel as set forth in claim1 wherein said layer of vitreous material is sulfur.

6. An electroluminescent display panel as set forth in claim 1 whereinsaid layer of vitreous material is selenium silicon oxide. 7 a

7. An electroluminescent display panel as set forth in claim 1 whereinsaid layer of vitreous material is alumi-

1. An electroluminescent display panel comprising: a light translucent substrate; a transparent electrically conductive layer contiguous with one side of said substrate; a layer of electroluminescent material contiguous with said transparent electrically conductive layer; a plurality of metallized front electrodes and front islands with said front electrodes contiguous with said layer of electroluminescent material, said front electrodes and said front islands insulated from each other; a plurality of column leads connected to said plurality of front islands; a layer of vitreous material contiguous with said plurality of metallized front electrodes and front islands and said layer of electroluminescent material; a plurality of metallized rear electrodes and rear islands contiguous with said layer of vitreous material; a plurality of row leads connected to said plurality of rear islands; a positive direct current power supply, said power supply connected to said plurality of metallized rear electrodes for establishing a voltage differential across said layers of vitreous material and electroluminescent material such that the voltages differential between said rear and front metallized electrodes is close to the breakdown voltage of said layer of vitreous material; a bucket brigade column shift register having two horizontal clock pulse circuits and horizontal synchronizing circuit as inputs and a plurality of column shift register metallic oxide semiconductors as outputs; a bucket brigade row shift register having a vertical clock pulse circuit and vertical synchronizing circuit as inputs and a plurality of row shift register metallic oxide semiconductors as outputs wherein said two horizontal clock pulse circuits and said vertical clock pulse circuit are adapted for receiving display information; a video terminal; a plurality of video metallic oxide semiconductors having a gate electrode, a drain electrode, and a source electrode wherein said video terminal is connected to said source terminal of the plurality of video metallic oxide semiconductors and wherein the outputs of said plurality of column shift register metallic oxide semiconductors is connected to said gate terminal of the video metallic oxide semiconductors for switching video invormation through the video metallic oxide semiconductors to the rear metal islands for breaking down said layers of vitreous material and electroluminescent material to provide a display on said electroluminescent material according to the input display information to said column and row shift registers.
 2. An electroluminescent display panel as set forth in claim 1 wherein said light translucent substrate is glass.
 3. An electroluminescent display panel as set forth in claim 1 wherein said transparent electrically conductive layer is tin oxide.
 4. An electroluminescent display panel as set forth in claim 1 wherein said layer of vitreous material is germanium.
 5. An electroluminescenT display panel as set forth in claim 1 wherein said layer of vitreous material is sulfur.
 6. An electroluminescent display panel as set forth in claim 1 wherein said layer of vitreous material is selenium silicon oxide.
 7. An electroluminescent display panel as set forth in claim 1 wherein said layer of vitreous material is aluminum oxide. 